NVIDIA has been redefining computer graphics, PC gaming, and accelerated computing for 30 years. It's an outstanding legacy of innovation that's motivated by phenomenal technology-and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent. As an NVIDIAN, you'll be immersed in a diverse, encouraging environment where everyone is inspired to do their best work. Come join our team and see how you can make a lasting impact on the world!

In this role, the Technical Program Manager (TPM) will lead all block/chip level Physical Design (PD) activities, from floor planning to layout verification. This role also includes managing the netlist to GDSII flow, ensuring quality control, and coordinating with engineering teams and contractors. The TPM is expected to streamline onboarding and deboarding processes of the 3rd party contractors, collect their daily feedback, handle timesheets, manage their paperwork, and address contractor attrition and replacement issues. This role is critical for improving PPA and ensuring timely project execution.

• Contractor Management:
  
  
  • Streamline onboarding and deboarding processes for contractors.
  • Collect daily feedback from contractors to identify potential issues and areas for improvement.
  • Handle contractors' timesheets and ensure accuracy for billing and payment.
  • Manage contractors' paperwork, including contracts and agreements.
  • Manage contractor attrition and replacement, ensuring smooth transitions.
  • Frequently remind contractors about information security (infosec) matters.
• Program and Process Management:
  
  
  • Work closely with engineering on various KPIs to improve overall execution processes and deliverables.
  • Collaborate with engineering and vendors to deliver and execute the roadmap.
  • Participate in sprint planning, stand-ups, sprint reviews, and retrospectives.
• Physical Design Leadership:
  
  
  • Lead all block/chip level PD activities, including floor plans, abstract view generation, RC extraction, PNR, STA, EM, IR DROP, DRCs, and schematic to layout verification.
  • Collaborate with design teams to address design challenges.
  • Debug tool/design related issues and improve RTL2GDS flow to enhance PPA.
  • Oversee all aspects of physical design and implementation of GPU and other ASICs.

• BE/BTECH/MTECH, or equivalent experience.
• 5+ years of experience in Physical Design.
• Excellent interpersonal and communication skills.
• Experience in program management and or working with contracting organizations in such a role would be a big plus
• Strong understanding of the RTL2GDSII flow or design implementation in leading process technologies.
• Expertise in synthesis, place & route, CTS, timing convergence, and layout closure.
• Proficiency in high-frequency design methodologies, block-level and full-chip floor-planning, and physical verification.
• Experience with tools like ICC2/Innovus, Primetime/Tempus used in RTL2GDSII implementation.
• Strong knowledge and experience in standard place and route flows, especially ICC2/Synopsys and Innovus/Cadence flows.
• Good automation skills in Perl, Tcl, and tool-specific scripting.
• Ability to multitask and work in a global environment.
• Excellent communication, analytical, and problem-solving skills.