Minimum qualifications:
- Bachelor's degree in Electrical Engineering or equivalent practical experience.
- Experience with emulation systems, including maintenance, upgrades, and methodology enhancements.
- Experience with associated EDA tools and the addition of automation and flow enhancements.
- Experience with programming/scripting (e.g., C, C++, Perl, TCL, Python), and a command of debug tools (e.g., Verdi, SimVision / Indago, gdb) to support methodology and automation work.
- Master's degree in Electrical Engineering or related field and 5 years of industry experience.
- Experience deploying EDA tools into distributed environments and supporting their efficient usage.
- Experience with RTL design, Verilog and simulation (VCS, Incisive, Questa), and System Verilog (DPI and transactors), assertions.
- Familiarity with system administration, networking, and security systems
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About the job
In this role, you'll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You'll be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
In this role, you will help develop and maintain emulation infrastructure, tools, and workflow methodologies supporting our ASIC projects. Creating ASICs represents a significant investment in time and money. Having a successful prototyping campaign helps to ensure success of these critical projects. However, as designs continue to increase in size and complexity, emulation becomes even more important in meeting verification and bring-up milestones. Providing excellent emulation infrastructure and methodologies is essential to supporting these projects.
You will work directly with other emulation team members as well as designers, verification engineers, and software teams. You will interface with our external vendors, lab support teams, networking and security, and EDA tooling and methodology teams to deliver emulation based prototyping capabilities for our ASIC projects. You may also assist in compiling projects targeting our prototyping platforms, debugging issues in both infrastructure and design, and assisting in the hardware and lab bring up and verification of our ASIC systems.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
- Help maintain and upgrade our emulation infrastructure and act as a primary interface to emulation vendors.
- Explore emulation methodologies, gather feedback from the team and implement new emulation workflows and methodologies.
- Create tooling and automation to support emulation EDA tools, licensing, and job management in Google infrastructure.
- Support emulation team members in debug of hardware, tooling, and project specific issues.
- Help bring up external interfaces (e.g., USB, PCIe, Ethernet etc) on the emulation platforms and create standalone test cases for tool issues encountered in the emulation compile and runtime flows.