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JD for CIC Frontend req AE3
Your role will be to meet customers/prospects and identify & qualify the opportunities, work out agreeable and achievable evaluation criteria, run through the evaluation and convert the opportunities into business leading to deployment of an efficient circuit simulation and mixed signal methodology using Cadence tools. It requires a very good understanding of customer flow & challenges and a good analytical ability to resolve issues impacting production schedule. Hands-on knowledge / experience on analog and mixed-signal circuit Design / Debug / modeling and simulation, would be a plus.
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The role demands a close interaction with R&D and Product Engineering team for implementation of new features and bug fixes.
As the job requires an extensive interaction with customers for issue resolution and identifying opportunities to proliferate Cadence technologies, at the same time a closer interaction with R&D and other stakeholders, it demands an excellent customer and communication skills, and the leadership qualities.
This position requires a solid understanding of IC design process/methodology in analog and mixed-signal design. The candidate should have in-depth knowledge and hands-on experience of complete analog front-end flow from design entry, real number modeling, pre-layout simulation, post layout simulation, mixed-signal simulation, EMIR analysis etc. with proficiency in tools like Virtuoso Schematic, Virtuoso ADE, Spectre, AMS Designer, etc.
- B.Tech or equivalent with 3 to 7 years of relevant experience.
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