At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Ideal candidate should have:
1. Strong ability to analyze electrical and electronic circuits, and debug common problems.
2. Excellent knowledge on how power, IR, and EM analyses impact chip planning to IR/EM sign-off.
3. Knowledge of package analysis and die modeling.
4. Experience with Parasitic Extraction.
5. Good debugging skills in P&R, STA, and chip power/IR/EM sign-off.
6. Excellent background in at least one scripting language such as Python or Tcl and a good understanding of fundamental algorithms.
7. Understanding of EDA industry and how EDA industry fits into the larger Semiconductor industry eco-system.
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8. Alacrity to be a good team player.
9. Strong willingness to collaborate with others on the team as we solve problems our customers face.
10. Discipline and determination to grow as a key member of the AE team.
The annual salary range for California is $120,400 to $223,600. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
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