Sr. Staff Semiconductor Design Engineer, High Speed IO
We are Aptiv - a global technology company with 190,000 specialists in 46 countries. We develop innovative software and build the hardware to bring autonomous driving cars, advanced driver-assistance systems, connected vehicles and smart cities to life in a way that only we can. We work in partnership with almost all car manufacturers. Our sensors, systems and software can already be found in almost all passenger cars today.
With our deep domain expertise, Aptiv is developing solutions that solve our customers' toughest challenges. We are enabling the transition to software-defined vehicles supported by electrified and intelligently connected architectures - which will combine to power the future of mobility.
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Aptiv's custom silicon management group provides critical custom Silicon for all Aptiv products including Autonomous Driving, ADAS, Infotainment, Zonal Control, and others. This team translates the system requirements of Aptiv's next-generation products into the SOC/IC requirements and architectural design, then commissions external SOC/IC design partners to develop those products for Aptiv and manages the technical execution of the SOC/IC development.
We are looking for a Sr staff semiconductor design engineer to work closely with multiple Aptiv engineering teams who are focused on the development of Aptiv's future generation of products.
This role is based in Aptiv's Bangalore, India office and will interface closely with Aptiv teams in California, USA and Germany. To facilitate collaboration with Aptiv's US/EU teams this role's regular working hours will include at least 7:30-10:30pm on workdays.
Your Role:
- Candidate should have a deep understanding of analog mixed-signal design with experience in high-speed transceivers. Demonstrated history of technical leadership.
- Expertise in designing the following high-speed IO and SERDES architecture of USB 2.0/3.0, PCIe Gen 5/6, LPDDR4/DDR4/DDR5/LPDDR5, MIPI CSI/DSI, Display Port, Ethernet, General Purpose IO Library. PHY Porting: MIPI, USB, HDMI, PCIe, DDR etc.
- Experience in clock generators : High-performance low-skew Low Power Crystal Oscillator, RC Oscillator, Low Jitter PLL and DLL Designs Clock Buffers and Dividers.
- In-depth knowledge of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques.
- Hands-on experience with AMS IC development from definition to high-volume production including layout supervision, bench evaluation, correlation, and characterization.
- Work closely with SoC Integration teams to drive high level achievements for IP development.
- Work closely with our design partners & perform thorough design/verification/implementation reviews.
- Strong intuitive and analytical understanding of transistor- level circuit design including noise and mismatch analysis Experience with analog and digital behavioral modeling.
Familiar with Cadence schematic capture, virtuoso, Spectre and/ or HSPICE circuit simulation tools. - Must be familiar with layout parasitic extraction tools and layout dependent impairments in advanced CMOS processes.
- Work closely with our design partners and provide feedback, improvements to the IP. Collaborate with software/hardware teams to lead silicon validation of IPs.
- Support lab characterization of silicon.
- Lead weekly meetings with IP consumers to resolve technical issues.
- Support Post-Si teams for Product Performance, Power and functional issues debug/resolution
Your Background:
- Bachelor's degree in electrical engineering, computer engineering, or equivalent.
- 12+ years of experience in ARM CPU based full chip SoC development.
- Proven experience crafting Analog and Mixed-signal IPs and products
- Experience working in a dynamic engineering environment and real-time crisis management skills
- Committed to own/drive project development using well-defined metrics.
- Excellent written and verbal interpersonal skills.
- Advanced knowledge of IP development process, tools/flows and methodologies and life cycle in a SoC.
- Experience with Tx/Rx equalization techniques and circuits like de-emphasis, CTLE, DFE
- Experience with high-speed digital circuits (e.g., serializer, deserializer, counters, dividers, etc.)
- Experience in lab testing of high-speed transceivers
- Able to build VerilogA/AMS behavioral models
- Able to analyze and lead characterization data from lab and volume testing
Why join us?
- You can grow at Aptiv. Whether you are working towards a promotion, stepping into leadership, considering a lateral career move, or simply expanding your network - you can do it here. Aptiv provides an inclusive work environment where all individuals can grow and develop, regardless of gender, ethnicity or beliefs.
- You can have an impact. Safety is a core Aptiv value; we want a safer world for us and our children, one with: Zero fatalities, Zero injuries, Zero accidents.
- You have support. Our team is our most valuable asset. We ensure you have the resources and support you need to take care of your family and your physical and mental health with a competitive health insurance package.
Your Benefits at Aptiv:
- Hybrid and flexible working hours;
- Higher Education Opportunities (UDACITY, UDEMY, COURSERA are available for your continuous growth and development);
- Life and accident insurance;
- Sodexo cards for food and beverages
- Well Being Program that includes regular workshops and networking events;
- EAP Employee Assistance;
- Access to fitness clubs (T&C apply);
- Creche facility for working parents;
Apply today, and together let's change tomorrow!
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Aptiv is an equal employment opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, national origin, sex, gender identity, sexual orientation, disability status, protected veteran status or any other characteristic protected by law.