Summary
Posted: Dec 12, 2024
Role Number:200579836
We are seeking motivated Analog Mixed-Signal designers to join our high-speed SerDes team. Our team specializes in building next generation high-performance wireline transceivers delivering intellectual-property (IP) for Apple's world-leading system-on-chip (SOC)! In this role, you will actively work with cross-functional Analog Mixed-Signal design teams to create state-of-the-art IPs key to Apple's products. You will be challenged to make the best-in-class designs to surprise and delight Apple customers. With transforming the user experience in focus, you will get an opportunity to work on designs which makes the best systems. This enables you to learn to end-to-end system while exceeding the highest expectations of quality, innovation and efficiency. If you have strong fundamentals and a track record of tackling technical challenges, If you are passionate about learning new skills and improving the value of your work, If you like to be tuned to the bigger-picture while diving deeply into the details to innovate and solve problems, We invite you to join and grow with our team!
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Description
We work on the development of high-performance and high-speed AMS circuits used in SerDes PHY, including evaluation of different circuit topologies for specific product requirements (e.g., Rx, CDR, Tx, bias generator, high-speed clock generation and low-jitter distribution, phase interpolator, DLL, VCO, LDO) with best in class power, performance, and area (PPA). We lead discussions with multi-functional teams (e.g., architecture, SIPI, packaging, board design, DFT, ESD) to create and drive block-level specifications, mixed-signal implementations and behavioral modeling. We work closely with SOC teams to deliver IP views and ensure they meet the quality standards. While developing these complex IPs on regular basis, we interact with peers/management to communicate progress, discuss new ideas and drive new implementations/concepts making it an exciting and growth-oriented work environment.
Minimum Qualifications
- BSEE required
Preferred Qualifications
- Technical Expertise: Demonstrated proficiency in high-speed analog/mixed-signal architecture and circuit design, including frequency synthesizers, ADCs, DACs, RO/LC oscillators, regulators, on-chip sensors, compensation techniques, droop detection and recovery, and digitally-assisted analog techniques.
- Clocking Mastery: Deep understanding of clocking fundamentals, with a solid grasp of phase noise, jitter analysis, budgeting, and feedback loop dynamics.
- Simulation and Modeling: Skilled in designing/debugging RTL, developing System Verilog models, and performing behavioral simulations to explore new architectural performance and functions.
- Attention to Detail: Exceptional focus on understanding the problems at hand and their systemic impacts, ensuring thoroughness in problem-solving
- EXPERIENCE IN THE FOLLOWING AREAS IS A PLUS
- Concepts of timing closure and related industry tools (e.g., Nanotime, Primetime)
- Concepts of IP delivery and quality checks
- Knowledge of common high-speed SerDes protocols (e.g., PCIe, USB, DP, MPHY) is helpful
- Skills in scripting and automation to improve efficiency are highly desirable
- Team Collaboration: Outstanding teamwork capabilities paired with strong productivity and scripting skills, ideally with experience in using industry-standard design tools.
Additional Requirements
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- Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.