Skip to main contentA logo with &quat;the muse&quat; in dark blue text.

SerDes Circuit Design Engineer

AT Apple
Apple

SerDes Circuit Design Engineer

Melbourne, FL

Summary

Posted: Oct 14, 2024

Role Number:200573169

We are seeking experienced Analog Mixed-Signal designers to join our high-speed SerDes team. Our team specializes in building next generation high-performance wireline transceivers delivering intellectual-property (IP) for Apple's world-leading system-on-chip (SOC)! In this role, you will actively work with cross-functional Analog Mixed-Signal design teams to create state-of-the-art IPs key to Apple's products. You will be challenged to make the best-in-class designs to surprise and delight Apple customers. With transforming the user experience in focus, you will get an opportunity to work on designs which makes the best systems. This enables you to learn to end-to-end system while exceeding the highest expectations of quality, innovation and efficiency. If you have strong fundamentals and a track record of tackling technical challenges, If you are passionate about learning new skills and improving the value of your work, If you like to be tuned to the bigger-picture while diving deeply into the details to innovate and solve problems, We invite you to join and grow with our team!

Want more jobs like this?

Get jobs in Melbourne, FL delivered to your inbox every week.

By signing up, you agree to our Terms of Service & Privacy Policy.


Description

We work on the development of high-performance and high-speed AMS circuits used in SerDes PHY, including evaluation of different circuit topologies for specific product requirements (e.g., Rx, CDR, Tx, bias generator, high-speed clock generation and low-jitter distribution, phase interpolator, DLL, VCO, LDO) with best in class power, performance, and area (PPA). We lead discussions with multi-functional teams (e.g., architecture, SIPI, packaging, board design, DFT, ESD) to create and drive block-level specifications, mixed-signal implementations and behavioral modeling. We work closely with SOC teams to deliver IP views and ensure they meet the quality standards. While developing these complex IPs on regular basis, we interact with peers/management to communicate progress, discuss new ideas and drive new implementations/concepts making it an exciting and growth-oriented work environment.

Minimum Qualifications

  • BSEE with 3+ years of proven experience.

Preferred Qualifications

  • The ideal candidate should have deep understanding of AMS design with experience in high-speed serial links.
  • Solid understanding of designing AMS circuit blocks including Bandgap, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, Oscillators, Filters
  • Understanding of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques
  • Deep understanding and experience with digitally assisted analog design concepts (e.g. background calibrations, LMS based adaptive loops)
  • Proven experience working on system and architecture teams to drive block-level and IP requirements
  • Proven track record working with large teams and guiding junior engineers
  • Experience with high speed digital circuits (e.g., serializer, deserializer, counters, dividers, etc.) with solid understanding of digital design concepts
  • Experience and proven understanding of Tx/Rx equalization techniques and circuits (e.g. CTLE, DFE, de-emphasis) for 20+ Gbps NRZ and PAM applications
  • Experience with EQ adaptation methods and circuit interactions to improve PPA
  • Solid understanding of CDR architectures and implementations
  • Experience in Analog Mixed Signal circuit modeling and performance evaluation (e.g. SystemVerilog, Matlab, Python, VerilogAMS)
  • Hands-on experience to drive lab testing, debug and data analysis
  • Hands-on experience in advanced CMOS technologies, design with FinFet technology
  • Hands-on experience with AMS IC development from definition to high-volume production including layout supervision, bench evaluation, correlation, and characterization
  • EXPERIENCE IN THE FOLLOWING AREAS IS A PLUS
  • Concepts of timing closure and related industry tools (e.g., Nanotime, Primetime)
  • Concepts of IP delivery and quality checks
  • Knowledge of common high-speed SerDes protocols (e.g., PCIe, USB, DP, MPHY) is helpful
  • Skills in scripting and automation to improve efficiency are highly desirable

Additional Requirements

More

  • Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.

Client-provided location(s): Melbourne, FL, USA
Job ID: apple-200573169-2
Employment Type: Other

Company Videos

Hear directly from employees about what it is like to work at Apple.