Requirement
Physical Design
Experience
2+ YoE
Candidate Requirement
- In-depth knowledge and hands-on experience on Netlist2GDSII Implementation i.e. Floor planning, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification.
- Should have experience on Physical Design Methodologies and sub- micron technology of 28nm and lower technology nodes.
- Should have experience on programming in Tcl/Tk/Perl.
- Must have hands-on experience on Synopsys/Cadence tools. (Innovus, ICC2, Primetime, PT-PX, Calibre).
- Well versed with timing constraints, STA and timing closure.
Requirement
Design Verification
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Experience
2+ YoE
Candidate Requirement
- 10-12+ years of experience in IP/SOC/CPU/Subsystem level Verification.
- Good hands-on experience in any protocols like USB, DDR, Amba, Ethernet and PCIE (Gen4/Gen5/Gen6).
- Good knowledge on PCIe transaction layer, routing, reset flows etc.
- Good experience with AXI protocol, NOC subsystem verification.
- Good SV-UVM knowledge with hands-on experience in testbench development.
- Good debugging skills.
- Knowledge on performance verification is a plus
- Be able to lead a team of 8-20 members with technical ownership of the project.
Requirement
Analog Circuit Design
Experience
2+ YoE
Candidate Requirement
- Circuit Design implementation of SERDES blocks like Transmitter, FFE, Receiver, CTLE, DFE, Summer, SAL/Design of basic analog IPs like ADC/DACs, PLLs, Oscillators, General Purpose IOs, Temperature sensor etc/Design of blocks like LDOs, Band Gap reference, Current Generators, POR.
Requirement (Role)
DFT Engineer , Lead Engineer
Experience
2+ YoE
Candidate Requirement (JD)
As a Design For Test expert you'll be involved in implementation and verification ATPG/Scan insertion.
What you'll do:
Key skills required for the job are in VLSI Design For Testability - DFT (Mandatory) .
1. DFT implementation and verification
2. Implementation tools like Mentor Tessent Fastscan, Testkompress or Synopsys DFT compiler and Tetramax
3. Sound knowledge of ATPG/Scan, coverage analysis, EDT compression etc.,
4. Memory BIST implementation and verification
5. Sound debug skills to debug simulation failures at RTL-level and gate-level
6. Exposure to Static timing in DFT modes to debug constraint issues and review/analyse timing reports.
Role Purpose
The purpose of the role is to design, and architect VLSI and Hardware based products and enable delivery teams to provide exceptional client engagement and satisfaction.
Do
- Provide technical leadership to the design, development and implementation of custom solutions through thoughtful use of modern technology
- Identify problem areas and perform root cause analysis of architectural design and solutions and provide relevant solutions to the problem
- Tracks industry and application trends and relates these to planning current and future IT needs
- Identifies implementation risks and potential impacts.
Stakeholder Interaction
Stakeholder Type
Stakeholder Identification
Purpose of Interaction
Internal
Delivery teams
Review of architectural process deployment in engagements, escalation management, issue resolution
Pre-sales team
For solutioning and architectural design purpose
Holmes engineering and roll out
For automation purpose
Talent Transformation Team, Competency Group
Plan and support delivery of Technical Trainings, knowledge sharing
HRBP
For hiring and managing resources
Finance
Revenue / budgets
Talent acquisition team
Recruitment
External
Vendors/ Partners
For strategic alignment and partnerships, training
Industry forums
Best practices, market intelligence, knowledge sharing
Display
Lists the competencies required to perform this role effectively:
- Functional Competencies/ Skill
- Domain/Industry Knowledge - Awareness and knowledge of broad economic, demographic, technological and global trends within own ecosystem - Expert
- Market Intelligence - Deep specialized understanding of the ecosystem practice, overall market & competition and nuances of delivery in that domain - Master
- Systems Thinking - Understanding of the Wipro system (interrelatedness, interdependencies and boundaries) and perform problem solving in a complex environment - Expert
- Leveraging Technology - In-depth knowledge of and mastery over ecosystem technology that commands expert authority respect - Master
- Technical knowledge - Complete understanding of technology and infrastructure used for product creation and cyber risks involved, architectural designs and principles - Expert
- Conceptualize and Engineering of Products - software and software hardware integrated product development
- Problem Solving
Competency Levels
Foundation
Knowledgeable about the competency requirements. Demonstrates (in parts) frequently with minimal support and guidance.
Competent
Consistently demonstrates the full range of the competency without guidance. Extends the competency to difficult and unknown situations as well.
Expert
Applies the competency in all situations and is serves as a guide to others as well.
Master
Coaches others and builds organizational capability in the competency area. Serves as a key resource for that competency and is recognised within the entire organization.
- Behavioural Competencies
- Strategic perspective
- Technology Acumen
- Design Thinking
- Innovation
- Problem Solving approach
- Managing Complexity
- Client centricity
- Execution excellence
- Change agility
- Passion for results
Deliver
No.
Performance Parameter
Measure
1.
Product design, engineering and implementation
CSAT, quality of design/ architecture, FTR, delivery as per cost, quality and timeline, POC review and standards
2.
Capability development
% trainings and certifications completed, mentor technical teams, Thought leadership content developed (white papers, Wipro PoVs)
VLSI HVL Verification