Siemens Digital Industries Software is a global technology powerhouse. With some of the best-known brands in the world, Siemens has stood for engineering excellence, innovation, quality, and reliability for more than 175 years.

The Digital Verification Technologies (DVT) Division is seeking highly qualified candidates for available full time jobs within Simulation Product Line Quality, Testing and Test Automation Team. Candidates will get to work with trending technologies and tools for Simulation and Debug of Digital Designs as Management of Verification Data and Process. Candidates will gain a solid base about describing the HW design and verification environment using a large spectrum of HDLs and Testbench Specification Languages such as (Verilog, SystemVerilog, VHDL, SystemC, SVA, UPF and UVM). They will also get to contribute to validation of Next Gen Technologies built with ML/AI.

• Mastering QuestaSim Digital Simulator with a good understanding about the underlying technology.
• Work with product engineering and development groups to get a clear vision on newly integrated features in the SIM Products across consecutive releases.
• Write, maintain and execute product test/quality plans that guarantee high functional coverage for the feature under test.
• Design new test cases which comply with the predefined test plans, test cases execution and summarizing test findings in the test summary reports.
• Participate in product unit testing, regression testing, license testing, installation testing and GUI testing throughout the release life cycle.
• Build test automation framework to eliminate manual testing rework and reduce testing turnaround time.
• Develop product build and regression test infrastructure.
• Understand customer usage profile for simulation based verification and help with the integration of customer designs in our test environments.
• Product benchmarking and performance measurements iterations to capture tool performance data between releases.
• Identify product quality attributes and define a process to help build up these attributes throughout the product development cycle
• Verifying final product conformance to the pre-specified quality exit criteria and being able to take yes-to-go decision for product releases.
• Defects reporting, defects validation and defect triaging to understand the root cause of the problem and define their criticality to RD groups.
• Apply code coverage techniques/tools to quantitatively judge product test coverage.
• Help in the deployment and monitoring of other qualification techniques like static code analysis (Lint), dynamic code analysis and memory leakage checks.

• B.Sc., M.Sc. in Electrical Engineering, Computer Engineering.
• Excellent knowledge about Digital/RTL design basics is required.
• Strong knowledge about Hardware Description Languages (Verilog, VHDL or System Verilog) is Required.
• Good Knowledge in UVM is a plus.
• Good Knowledge about assertion specification languages such as (PSL, SVA or OVL) is a plus.
• Scripting languages such as Linux Shell, Python, Perl is required.
• Experience with automation tools specifically designed for desktop applications like Squish, and Frameworks like QT is an advantage.
• Familiarity with HTML, CSS, JavaScript, and web frameworks, as well as RESTful APIs for testing web applications is a plus.
• Knowledge about the quality assurance concepts and SW testing.
• Knowledge about testing strategies, test planning and testing automation frameworks.
• Knowledge about UI/UX, defect tracking systems, configuration management and code profiling tools is a plus.
• ISTQB Foundation Level certification is an adavnatge.
• Proficient in documenting test results, reporting bugs, and working collaboratively with developers and other stakeholders to improve software quality.
• Excellent Communication Skills, Self-Motivated Engineer with Good Capability for Continuous Learning.