Looking for Siemens EDA ambassadors:PowerPro PV/CAE for Power Estimation /Optimization

We are passionate about innovations thatmean real progress, and we are curious about technologies that still need to bedeveloped. Do you want to use curiosity, passion, and creativity to make thelives of millions of people easier and better? Join us - whichever path youtake, we're looking forward to seeing your point of view!

As an integral part of the Siemens EDAteam, you will contribute to Siemens EDA by increasing efficiency and customersatisfaction Siemens EDA's Power platform. This is an ambitious position thatwill assist in growing Siemens's EDA business in India.

About the group:

Calypto System Design "Central EngineeringGroup (CEG)" group. CSD works on cutting edge tools like PowerPro, Catapultetc. The Product Validation and Customer Support team of CEG ensures qualityproducts, educated and satisfied customers in the market for High LevelSynthesis. PowerPro is the commercially available RTL sequential poweroptimization and power analysis tool. We are a team driven with lots of energy,synergy and passion.

• B.Tech (EE/ECE) or M.Tech (VLSI/Microelectronics)

• Work as an integral part of Product Validation and Customer Support team to validate and educate feature of PowerPro.
• Being the internal end-user of the tool, validate all features and report issues. Development of test plan and writing test cases. Take measures to improve quality of Product and test environment. Support and debug customer test design methodologies using our products.
• Participate in architecture reviews and involve in defining features prototyping. Get along with field teams to understand customer design flows requirements and propose measures to optimize and improve flow results.
• Analyse customer reported bugs and plug gaps in testing, incorporate newer designs/flows. Use technical expertise to respond to customer inquiries, demonstrate products. Provide field application support to customer. Role may involve interaction with customers on critical issues to narrow down the problem.
• Work on different methodology for customer scenario. Provide script-based solution for quick turnaround time.
• Work on RTL to GDS flow , Glitch, Veloce PowerPro, PowerPro optimization flows.

• Good knowledge of ASIC design flows, Verification, Digital Logic, Synthesis, RTL to GDS flow expertise, HDL Languages Verilog/VHDL/SV.
• Working Experience should be 2+ Years of experience
• Good understanding of low-power SOC design principles.
• Strong Debugging Skills is must.
• Experience with class of products like simulation, synthesis, Place & Route, etc.
• Excellent problem-solving and debugging capability.

• Low Power concepts, RTL/Gate Simulation and Emulation, SPEF, Different tech nodes.
• Knowledge of one of the scripting languages like Perl, Tcl. Python will be a plus.
• Knowledge of different tools like (DC, Fusion compiler, RTL Architect, Prime Power, Prime time, Zebu, joules, Gate sign off tools etc )

• Excellent verbal and written communication skills.
• Self-starter, motivated and strong teammate.
• Team Contributor, Quick learner.
• Hard working, sincere and committed to work.