Senior/Principal Electrical Engineering - EDA/CAD Engineer, Remote

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What Your Job Will Be Like:

We are seeking an R&D Electrical/EDA/CAD Engineer to fill a very unique role within Sandia's state-of-the-art fabrication facility. In this role, you will partner with our nationally renowned expert design teams across the labs to support our EDA Integrated Circuit design environment! Sandia's Microsystems Engineering, Sciences and Applications (MESA) facilities focuses on new microsystems products for nuclear weapon (NW) and other critical national security programs.

On any given day, you may be called on to:

• Lead/support next generation EDA tool selections.
• Provide continuous improvement of design and layout methodologies.
• Provide EDA tool support (scripting, new user setup, library management).
• Provide third party EDA tool point-of-contact support (bug reporting, issue resolution).
• Drive physical design auto-place route (APR) methodology.
• Implement final verification (layout vs schematic (LVS), design rule check (DRC), etc) processes, tools, and rule sets.

The selected applicant can be a remote worker located in any U.S. State or District of Columbia. Regular or periodic travel to your assigned work location may be required.

Salary Range:

$108,600 - $216,600

*Salary range is estimated, and actual salary will be determined after consideration of the selected candidate's experience and qualifications, and application of any approved geographic salary differential.

Qualifications We Require:

• Bachelor's degree in Electrical Engineering, Electronics Engineering or relevant STEM field plus five (5) years of directly related experience
• or Master's degree in the above plus one (1) year experience
• Experience with EDA tools from these tool providers: Synopsys, Cadence, and/or Siemens/Mentor Graphics
• Experience supporting analog, digital, or mixed signal EDA tool environments
• Ability to acquire and maintain a DOE Q clearance

Qualifications We Desire:

• Experience with custom library development, process design kit (PDK) development, and handling external IC Foundry collateral Experience with Unix/Linux shell scripting and X-Windows
• General knowledge and understanding of application-specific integrated circuit (ASIC) or field programmable gate array (FPGA) design flows
• Background includes EDA tool experience, specifically schematic capture, SPICE simulation, Verilog/VHDL simulation, and/or physical layout and verification tools and file formats used by these tools
• Experience with one or more of the following languages: Perl, Python, Ruby, SKILL
• Experience with a version control system, such as Perforce
• Project leadership and vendor/customer interface experience

About Our Team:

The Advanced CMOS Products and Design department develops and maintains digital, analog, and mixed-signal design and realization expertise. We have a deep understanding of technology offerings and design methodologies to provide custom microelectronic products and engineering services that fulfill the diverse needs of our customers including weapons systems, satellite systems, the intelligence community, armed services, other government agencies, the Sandia research community, and commercial industry.

We are a Category 1A accredited Defense MicroElectronics Activity (DMEA) Trusted Design Center. We provide ASIC Design Services in both radiation-hardened and non-radiation-hardened Foundries (350nm, 180nm, 130nm, 90nm, 65nm, 45nm, 32nm, 14nm, and 7nm). We are also involved in microelectronics research and development for next generation microelectronics in support of laboratory directed research and development (LDRD) and external sponsors. In addition to IC product development, the department works closely with our in-house radiation hardened CMOS technology group to maintain state-of-the-art radiation-hardened CMOS research, design, and production capability.

Posting Duration:

This posting will be open for application submissions for a minimum of seven (7) calendar days, including the 'posting date'. Sandia reserves the right to extend the posting date at any time.

Security Clearance:

Sandia is required by DOE to conduct a pre-employment drug test and background review that includes checks of personal references, credit, law enforcement records, and employment/education verifications. Applicants for employment need to be able to obtain and maintain a DOE Q-level security clearance, which requires U.S. citizenship. If you hold more than one citizenship (i.e., of the U.S. and another country), your ability to obtain a security clearance may be impacted.

Applicants offered employment with Sandia are subject to a federal background investigation to meet the requirements for access to classified information or matter if the duties of the position require a DOE security clearance. Substance abuse or illegal drug use, falsification of information, criminal activity, serious misconduct or other indicators of untrustworthiness can cause a clearance to be denied or terminated by DOE, resulting in the inability to perform the duties assigned and subsequent termination of employment.

EEO:

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, or veteran status and any other protected class under state or federal law.

NNSA Requirements for MedPEDs:

If you have a Medical Portable Electronic Device (MedPED), such as a pacemaker, defibrillator, drug-releasing pump, hearing aids, or diagnostic equipment and other equipment for measuring, monitoring, and recording body functions such as heartbeat and brain waves, if employed by Sandia National Laboratories you may be required to comply with NNSA security requirements for MedPEDs.

If you have a MedPED and you are selected for an on-site interview at Sandia National Laboratories, there may be additional steps necessary to ensure compliance with NNSA security requirements prior to the interview date.

Job ID: 695254

Job Family: RD

Regular/Temporary Position: R

Full/Part-Time Status: F