NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new challenges that are hard to tackle, that only we can pursue, and that matter to the world. This is our life's work, to amplify human inventiveness and intelligence. Make the choice to join us today.

NVIDIA Silicon Solutions Group is seeking engineers to join our post silicon HW team. As a member of this team, you will be developing and validating system level features based on product needs that will be delivered to notebook, desktop, embedded, automotive and professional solution markets.

• Develop and prototype system-level features on existing silicon, analyze return on investment, create/maintain feature bring-up plans for new silicon, and participate in bring-up execution.
• Lead debug efforts from the HW side to root cause feature sequence bugs, silicon bugs, and complex system-level issues caused by interactions between multiple HW and SW features.
• Craft creative solutions and WARs through lab experimentation and effective use of debug tools to achieve high product quality at a speed of light schedules.
• Support manufacturing and customer-facing teams to expertly address production needs and issues with relevant features.
• Work closely and proactively with other engineering teams such as system architects, chip and board designers, software/firmware engineers, HW/SW QA teams, and Applications engineering teams to drive design, development, debug, and release of next-generation products.

• BS or MS degree in Electrical or Computer engineering or equivalent experience.
• 8+ years of experience with system-level post-silicon bring-up and debug.
• Strong EE fundamentals, knowledgeable in digital design, computer architecture, power analysis, timing analysis, fault analysis, sampling, statistics, and scripting.
• Deep understanding of firmware/driver structures and their interaction with hardware.
• Working knowledge of PVT dependencies and binning methodologies.
• Knowledgeable in performance and power management techniques such as DVFS, clock and power gating, clock sequencing, binning, and power throttling.
• Hands-on validation experience with lab debugging and tools (oscilloscopes, multimeters, logic analyzers).
• Effective in a collaborative environment.
• Excellent problem-solving, teamwork, and interpersonal skills.

• Bringup experience with GPU/SOC architecture is a plus.
• Experience as a Silicon Bringup Lead.
• Experience in succeeding in a highly matrix organization.
• Driven process/methodology improvements.