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Senior High Speed IO Development Engineer

AT NVIDIA
NVIDIA

Senior High Speed IO Development Engineer

Shanghai, China

NVIDIA's GPUs and SOCs are the world leaders in performance and efficiency, and we are continually innovating in creative and unique ways to improve our ability to deliver extraordinary solutions in a wide range of sectors. We are seeking versatile engineers who are passionate about what they do and are committed to making a difference in the world through their inventions.

NVIDIA Silicon Solutions Group is seeking a versatile engineer to be part of the HW ArchDev HSIC(High-Speed Interconnects) team. You will dive into next-gen HSIO like PCIE, C2C, CXL to make advancements in efficiency and stability for our GPU and SOC product. The SSG team is uniquely positioned to have an end-to-end view of the product development cycle - from early arch definition through bringup to product release. Our ArchDev arm is a hub for all silicon and system-level feature development, tradeoff analysis, system integration solutions, and system POR alignment.

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What You'll Be Doing:

Innovate and Design: Architect and design innovative High-Speed IO like PCIE, C2C, CXL etc for complex silicon designs to improve quality, safety, perf/power, validation methodology and manufacturability; Ensure interoperability with connected devices and system components in complex interconnect topologies.

Collaborate and Lead: Collaborate across System Architecture, DFT, ASIC, SW/FW, platform, validation, and production teams throughout the product life cycle; Lead system-level architecture, design, productization, debugging, and deployment.

Push the Boundary: Define roadmaps by tracking industry/market trends, collecting current product feedback, prototyping new ideas, and conducting data-driven tradeoff analysis.

Hands-on Actions: Work closely and proactively with other engineering teams on silicon bring-up, validation, and debug; Coordinate product level feature deployment to achieve high product quality at aggressive schedule; Deep dive into technically challenging HSIO bugs and help drive debug efforts across various teams.

What We Need To See:

  • BS or MS degree in Electrical/Computer Engineering or equivalent experience.
  • 8+ years working in HSIO development, bringup planning, HSIO SerDes, protocol, functional and electrical validation, and/or power optimization
  • Experience with HSIOs like PCIE/CXL/USB/UFS/MGBE etc or chip-to-chip interconnects including understanding of process/temp/voltage sensitivity on BER.
  • Excellent experience with identifying full chip data paths for HSIO saturation and working with applications to stress test for stability.
  • Experience with system level and interconnect power management optimizations.
  • Strong EE fundamentals, knowledgeable in digital design, computer architecture, power analysis, timing analysis, fault analysis, sampling, statistics, and scripting.
  • Deep understanding of firmware/driver structures and their interaction with HW.
  • Hands on with Lab test and measurement equipment is a plus.
  • Excellent verbal communication and written, presentation skills.
  • Effective in a collaborative environment.

With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the technology world's most desirable employers. We welcome you join our team with some of the most hard-working people in the world working together to promote rapid growth. Are you passionate about becoming a part of a best-in-class team supporting the latest in GPU and AI technology? If so, we want to hear from you.

Client-provided location(s): Shanghai, China
Job ID: NVIDIA-JR1988178
Employment Type: Full Time