The ideal candidate will be a hands-on technical manager with experience in building C/C++ based simulators for complex ASICs. We seek a consensus driven leader with cross-functional partnership experience and proven track record in defining SOC Architecture, as well as building virtual platforms for functional and performance analysis of SoCs at different levels of abstraction.

ASIC Architecture and Performance Modeling Manager Responsibilities:

• Manage an ASIC Architecture team responsible for the definition of silicon architecture and the modeling of various processing blocks in multiple SOCs. Drive the development of C/C++/SystemC simulation models for silicon architecture and algorithm evaluation, performance analysis and hardware verification.
• Partner with cross-functional teams such as HW/SW Co-design, RTL design, verification, emulation, post silicon validation, firmware and software development, in the use and support of building ASIC architecture and simulation models to ensure first pass silicon success and rapid deployment into Meta data centers.
• Identify candidates, hire, schedule, support and train a team of ASIC engineers in order to develop products on time and on budget.
• Contribute to, analyze, review SOWs from vendors, supporting documentation, requirements that meet the needs of internal customers.
• Partner with technical program management and supply chain team members to manage external development partners, suppliers and vendors.

• Proven hands-on programming experience in C/C++ or any other object oriented programming languages.
• B.S. or M.S. degree in Computer Engineering or Electrical Engineering or related technical fields
• 6+ years of experience working in an ASIC architecture, algorithm development, ASIC firmware or Hardware Modeling team.
• 2+ years of experience as a People Manager.
• Clear understanding of complexities involved in the development, debug and use of virtual prototype models for complex ASICs, and tradeoffs in speed v/s accuracy of such models.
• Experience working across multiple projects and adjusting priorities in partnership with stakeholders.

• Experience in driving Silicon Architecture
• Experience managing and delivering C/C++ cycle-accurate, bit-accurate, and transaction accurate models for algorithm evaluation, performance analysis and hardware verification.
• Knowledge of machine learning concepts and/or other machine learning development frameworks.