Introduction
Infrastructure is a catalyst that makes the world work better because our clients demand it. Heterogeneous environments, the explosion of data, digital automation, and cybersecurity threats require hybrid infrastructure that only can provide.
Your ability to be creative, a forward-thinker and to focus on innovation that matters, is all support by our growth minded culture as we continue to drive career across our teams. Collaboration is key to Infrastructure success, as we bring together different business units and teams that balance their priorities in a way that best serves our client's needs.
The Infrastructure group is responsible for building and maintaining the components, tools, and systems that make up the Z Quantum Controls and Circuit Technologies. We are a large team spread across the world with a wide array of specialties and projects, working on everything from management to silicon.
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Product and technology landscape includes Research and Infrastructure. Entering this domain positions you at the heart of where growth and innovation thrive.
Your Role and Responsibilities
As a CPU Core Microarchitect and RTL Designer you will be responsible for defining and implementing the logical design used in the next-generation Cores powering the CPUs that are the heart of our system portfolio, including our IBM Z systems. Aggressive product requirements will create opportunities to implement innovative solutions in current products and influence the architecture/microarchitecture of future processors and systems. Opportunities could expand beyond the Processor Core to other parts of the CPU and/or other ASICs and FPGAs used across IBM's silicon portfolio.
Job Duties:
- Architect and specify novel CPU Core IP in conjunction with other CPU microarchitects and project leadership in support of program goals for function, performance, PPA, and schedule.
- Work with discipline leaders to continually prioritize work to optimize for schedule and quality.
- Effectively team with a cross-site team of leaders and individual contributors spanning CPU design, architecture, and software.
- Own and deliver the detailed RTL implementation of specific CPU Core IP.
- Refine the CPU design, document design updates, and communicate work progress.
- Effectively team with a cross-site, multidisciplinary team.
This diverse team is composed of IBM's best-in-class chip development team responsible for delivering the latest silicon used in the IBM z16 and IBM Power10 line of systems. This team is primarily based in Austin, TX and Poughkeepsie, NY but is distributed across multiple geographies with teams across the US and the globe in Israel, India, Germany and others.
Required Technical and Professional Expertise
- 5+ years of experience architecting and/or delivering RTL
- Demonstrated expertise in architecting and designing specific CPU Core IP (e.g., Instruction Fetch and Branch Prediction, Load/Store)
- Exposure to industry microprocessor designs and architectures
- VHDL or Verilog experience
- Inter-discipline design experience
Preferred Technical and Professional Expertise
- A deep understanding of one or more core architectures
- Understanding of Agile development processes