Minimum qualifications:
- Bachelor's degree or equivalent practical experience.
- 6 years of experience working in a hardware technical environment, or 5 years of experience with an advanced degree.
- 3 years of experience in technical leadership.
- Experience with yield analysis and optimization.
- Experience with microelectronics fabrication.
- Experience with semiconductors.
- Master's degree or Ph.D. in Electrical Engineering, Materials Science, Physics, or a related field
- Experience working with microLED display technology, including fabrication, characterization, and yield improvement
- Experience in a technical leadership role leading project teams and setting technical direction
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About the job
Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Raxium has established a semiconductor materials display technology that enables new functionality in display products, bringing to users a closer and more natural linkage between the digital and physical realms in applications such as augmented reality (AR) and light-field display. With start-up roots and a compound semiconductor fab, Raxium is seeking to build upon its engineering team, with an aim to disrupt next generation display markets.
In this role, you will be responsible for investigating the causes of yield loss in our process technology and leading cross-functional teams to drive yield improvement to ensure that our manufacturing processes are optimized to produce the highest possible output of quality products.
Google's Raxium display group has established a revolutionary semiconductor materials display technology that enables new functionality in display products, bringing to users a closer and more natural linkage between the digital and physical realms in applications such as augmented reality (AR) and light-field display. With start-up roots and a state-of-the-art compound semiconductor fab in Silicon Valley, Raxium is seeking to build upon its engineering team with an aim to disrupt next-generation display markets.
The US base salary range for this full-time position is $168,000-$252,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target salaries for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google .
Responsibilities
- Assess yield performance throughout the manufacturing process and establish failure paretos.
- Utilize statistical analysis and failure analysis methods to identify root causes of yield loss.
- Collaborate with and lead cross-functional teams to develop, implement, and maintain yield improvement plans and strategies.
- Drive optimization of process specifications, tools, and binning strategies to maximize yield outputs while optimizing for cost and operations.
- Build correlations between inline monitors and test results to enable excursion detection and screening.