Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 5 years of experience with industry-standard tools, languages, and methodologies relevant to the development of silicon-based ICs and chips.
- 5 years of experience with silicon quality or reliability.
- Experience with CMOS technology and device physics.
- Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related fields.
- 12 years of experience in silicon quality or reliability.
- Experience in Data Analytics to identify commonalities and abnormalities.
- Experience in semiconductor reliability, manufacturing processes (e.g., fab, assembly, test), or IC and packaging failure mechanisms and related failure analysis.
- Knowledge of Design-for-Reliability guidelines and implementation techniques.
- Familiarity with test methods and hardware for silicon qualification (e.g., HTOL chambers, ESD, LU, etc.).
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About the job
Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will help build the state of the art SoC's that power these data centers by driving quality and reliability processes in High Volume Manufacturing (HVM) from the Integrated Circuit perspective. You will have an opportunity to create silicon and follow it into the field to drive improvements for current and future generations of chips. You will work with various cross functional teams to develop HVM quality and reliability specifications. Within the larger organization, you will collaborate with global hardware quality and reliability teams, silicon design, validation and engineering teams.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
- Collaborate with design, manufacturing, and hardware/component quality teams to ensure High Performance Computing (HPC) SOC silicon products meet quality and reliability requirements during mass production, including statistical yield limits (SBL/SYL), yield tracking, excursion monitoring.
- Lead Material Review Board (MRB) efforts to disposition manufacturing issues.
- Drivecross-functional investigation of IC quality and reliability issues to identify root causes and develop solutions (RMA Triage, Analytics, Failure Analysis, etc.).
- Manage and drive periodic Ongoing Reliability Monitoring (ORM) activities including rejects validation and data analysis activities.
- Support fleet Defective Parts per Million (DPPM) data collection, classification, and modeling.