Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- Academic coursework in computer architecture (e.g., core, cache, memory, etc.).
- Experience with C/C++ or RTL.
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- Experience designing/implementing or validating RTL design (e.g., core, cache, fabric, memory, codec, etc.).
- Knowledge of OS, Firmware, or software stack.
- Knowledge of performance or power architecture, power estimation, modeling, or optimization of processor or ASIC.
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About the job
Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
We welcome 2024 and 2025 graduates.
Responsibilities
- Perform performance validation and simulation using C/C++ and RTL-based models, and performance correlation.
- Perform analysis results in both qualitative and quantitative fashion.
- Create tools/scripts to automate test suites and models to improve functionality of simulators.
- Participate in evaluation of future ASIC designs and general architecture.