Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 8 years of experience in Emulation, FPGA Prototyping, or Validation domains.
- 4 years of experience in people management, developing employees.
- Experience in emulation/FPGA/simulation model build flows, model bring-ups and debugging.
- Experience with industry standard emulation/FPGA prototyping platforms (e.g., Palladium, Zebu, Veloce, Protium, HAPs, etc.).
- 3 years of experience leading an emulation or FPGA prototyping team.
- Experience with EDA debug tools (e.g. Verdi, SimVision/Indago, GDB) and SoC architecture and interfaces (e.g., DDR, PCIe, etc.).
- Experience programming and scripting in C, C++, Python, Perl, or TCL.
- Experience of working with firmware/software teams to define model configurations to enable early software development.
- Experience validating (or enabling) emulation friendly models in a Design Verification (DV) environment and bringing up bare-metal software on SoCs.
- Understanding of RTL to Emulation/FPGA flows including Emulation test benches (e.g., Transactors/Accelerated VIPs, Hybrid, In-circuit Emulation).
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About the job
In this role, you'll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You'll be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
In this role, you will help design, verify, and deploy ASIC projects through emulation based prototyping. You will work directly with other emulation prototyping team members as well as designers, Design Verification (DV) engineers, Silicon Validation engineers, and Software teams to deliver emulation based prototyping capabilities for our ASIC projects, including compiling projects managing our prototyping platforms, debugging issues in infrastructure and design, and assisting in the hardware and lab bring up and validation of our ASIC systems.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
- Build, manage and lead the team responsible for full chip emulation/FPGA prototyping of complex AI/ML SoC designs and deliver to multiple customers such as software, firmware, platform, and post-silicon validation teams.
- Lead and enable the team to bring up system level emulation models through reset, boot, and bare metal content or OS. Influence the design and verification teams to enable emulation friendly model development.
- Work with architects, designers, software engineers, pre- and post-silicon verification engineers to develop and review test plans, coverage, and reproduce failures on emulation.
- Lead the development, execution, and debugging of full-chip/SoC tests on emulation platforms. Explore new verification and emulation methodologies and implement them.
- Drive all the people management functions including, but not limited to, hiring, people development, prioritizing and managing resources to achieve project execution timelines.