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Google

Silicon Design Verification Engineer

Bangalore, India

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
  • 5 years of experience with verification methodologies and languages (e.g., UVM and SystemVerilog).
  • Experience developing and maintaining verification testbenches, test cases, and test environments.
Preferred qualifications:
  • Master's degree or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • Experience with different verification techniques and methodologies including formal, GLS, UPF based power simulations, and UVM and C based testing to achieve bug-free Silicon in SoCs.

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  • Experience in ARM and RISC-V processor based Design Verification (DV) including tool chains and C based testing.

  • About the job

    Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. From Pixel phones to Nest devices and Fitbit wearables, you'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

    Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

    Responsibilities

    • Plan the verification of complex digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
    • Create and enhance constrained-random verification environments using SystemVerilog and UVM or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
    • Identify and write all types of coverage measures for stimulus and corner-cases.
    • Debug tests with design engineers to deliver functionally correct design blocks.
    • Participate with architecture, design teams, Silicon Validation and Software teams in defining the overall verification strategy of our SoCs.

    Client-provided location(s): Bengaluru, Karnataka, India
    Job ID: Google-118975653172126406
    Employment Type: Other

    Perks and Benefits

    • Health and Wellness

      • Health Insurance
      • Dental Insurance
      • Vision Insurance
      • Life Insurance
      • Short-Term Disability
      • Long-Term Disability
      • FSA
      • HSA
      • Fitness Subsidies
      • On-Site Gym
      • Mental Health Benefits
    • Parental Benefits

      • Birth Parent or Maternity Leave
      • Non-Birth Parent or Paternity Leave
      • Fertility Benefits
      • Adoption Assistance Program
      • Family Support Resources
      • Adoption Leave
    • Work Flexibility

      • Hybrid Work Opportunities
    • Office Life and Perks

      • Commuter Benefits Program
      • Casual Dress
      • Pet-friendly Office
      • Snacks
      • Some Meals Provided
      • On-Site Cafeteria
    • Vacation and Time Off

      • Paid Vacation
      • Paid Holidays
      • Personal/Sick Days
      • Leave of Absence
      • Volunteer Time Off
    • Financial and Retirement

      • 401(K) With Company Matching
      • Company Equity
      • Performance Bonus
      • Financial Counseling
    • Professional Development

      • Tuition Reimbursement
      • Internship Program
    • Diversity and Inclusion

      • Employee Resource Groups (ERG)

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