Knowledge of arithmetic units, bus architectures, accelerators, or memory hierarchies.

Knowledge of high performance and low power design techniques.

Ability to estimate performance by analysis and modeling, with excellent defining and driving performance test plans skills.

About the job

In this role, you'll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You'll be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

As an SoC Lead Architect, you'll drive the Architecture of multiple domains of an AI/ML SoC and will support the engineering teams during the implementation and validation phases, pre-silicon and post-silicon. You will work closely with internal system teams and external partners to develop a comprehensive understanding of the required SoC functions given its surrounding hardware, software, and the economic environments. You'll also collaborate with the engineering teams to drive the optimal balance between performance, features, power, schedule, and cost.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities

• Develop architecture and uArchitecture specifications for next generation AI/ML SoC.
  
• Evaluate different silicon solutions for executing Google's data center AI accelerator roadmap: off-the-shelf components, vendor co-developments, custom designs, and chiplets.
  
• Collaborate closely with Systems and Software teams to create high-performance hardware/software interfaces.
  
• Collaborate closely with design, verification, emulation, physical design, packaging, and silicon validation stakeholders to ensure that designs are complete, correct, and performant.
  
• Evaluate power, performance, area tradeoffs and drive improvements across generations.