Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 5 years of experience with computer architecture concepts, including microarchitecture, cache hierarchy, pipelining, and memory subsystems.
- 5 years of C or C++ software development experience in the area of consumer electronics or other embedded systems.
- 3 years of experience in driving ASIC architecture decisions from a software point of view.
- Experience with Advanced RISC Machine (ARM) or other low-power processor architectures.
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
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About the job
Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will understand software product requirements, use cases and applications, and how they relate to specific hardware blocks or sub-systems. You will represent the goals of the software team, their asking and their constraints, working at system architecture definition of hardware blocks with the Hardware Architects, and the implementation definition working with the Hardware Implementation team. You will define their work with the goal of ensuring fulfillment of software requirements, striving for optimal software programming model and interfaces, discuss and come to an agreement on hardware/software trade-off solutions, ensure scalability to future software and applications, and backwards compatibility as much as possible. You will strive to make decisions using a data motivated approach adopting or developing a modeling platform that will help you side your requests.
In this role, you will also be required to estimate the complexity of specific implementations with the intent of supporting educated estimation of staffing and schedule required by managers or planners.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
The US base salary range for this full-time position is $150,000-$223,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target salaries for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google .
Responsibilities
- Collaborate with stakeholders in product management, architecture, silicon architecture, silicon implementation, and software engineering to identify user experiences characteristics and how they can be mapped into existing hardware or hardware in development.
- Understand interactions between hardware components and motivate towards the definition of architecture and block's interactions design, providing options or trade-offs, identifying issues and driving them to resolution.
- Design architecture and software interfaces that enable a software programming model that can delight our application developers, and can let them make use of hardware accelerators.
- Design hardware that is easy to debug throughout the product development cycle, easy to control in terms of power and thermal, and is resilient to improper programming.
- Design architecture that assures security and privacy of the data for applications that are sensitive to it.