Familiarity with low power design techniques (e.g., power/voltage domain design, clock gating, power gating, Dynamic Voltage Frequency Scaling).

About the job

Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

In this role, you will collaborate with Functional Design, Design for Testing (DFT), Architecture, and Packaging Engineers. You will solve technical problems with innovative micro-architecture and practical logic circuits solutions, while evaluating design options with optimized performance, and power.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities

• Evaluate and optimize different power distributions (e.g., voltage rail assignments, regulator assignment, etc.) for a SoC.
  
• Work closely with power architects and produce detailed trade-off analysis of impact of Power Delivery Network (PDN) on different use-case power.
  
• Work on system and block level simulations (e.g., IR drop, Electromigration).