Minimum qualifications:
- Master's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 8 years of experience in high-performance microprocessor architecture, micro-architecture, performance, and design.
- Experience in CPU architecture with CPU blocks.
- Experience with C/C++ and scripting languages.
- Experience in performance modeling, analysis, correlation, and workload characterization.
- PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
- Experience leading CPU/ML micro-architecture exploration, performance model development, performance analysis, performance correlation, and workload characterization.
- Knowledge of system software components, such as Linux, drivers, and runtime.
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About the job
Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
With your technical expertise, you lead projects in multiple areas of expertise (i.e., engineering domains or systems) within a data center facility, including construction and equipment installation/troubleshooting/debugging with vendors.
As a Lead CPU architect in architecture and performance, you will be the key contributor to improve processor instruction set architecture, to develop innovative micro-architecture features, and deliver Google's advanced SoC products. You will have the opportunity to collaborate with talents in Google's Android applications and Google's AI teams to plan and conduct application and benchmark performance analysis, and to project their performance at various design phases.
Responsibilities
- Deliver solutions to problems that may be ambiguous or lacking clear precedent including CPU performance, micro-architecture design, tool infrastructure, and methodology.
- Plan, drive, and evaluate ARM's architecture features from both architecture and performance angles.
- Define and write CPU subsystem architecture specifications.
- Lead the collaboration with RTL, design verification, and physical design teams to develop an efficient CPU implementation.
- Drive performance correlation between the performance model and RTL implementation and perform pre-silicon and post-silicon performance bug triage.