Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 3 years of industry experience in direct to consumer electronics.
- Experience in ASIC display subsystem architecture and micro-architecture.
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- Experience in performance and power modeling for DPU (Display Process Unit).
- Experience with display processing pipeline architecture for hardware applications.
- Familiar with the RTL design, knowledge of ASIC architecture.
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About the job
Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
- Define architecture for display processing units (DPU).
- Define the detailed specifications for each display IPs.
- Produce detailed documents for proposed hardware implementation.
- Produce detailed trade-off analysis for engineering reviews and product roadmap decisions.