Minimum qualifications:
- Bachelor's degree in Electrical Engineering, a related field, or equivalent practical experience.
- 5 years of experience with Computer Aided Design (CAD) tools and flows or design verification.
- Experience with HDL design languages, simulation tools, and front-end design flows.
- Experience writing production scripts (e.g., Python,TCL) for CAD tools.
- Master's degree or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
- 8 years of design verification or front-end CAD working experience.
- Experience with Formal, FPGA, or Machine Learning (ML)-based design verification.
- Experience with job scheduling and DV regression management.
- Experience with tools, such as Xcelium, VCS, Questa, Jasper, Verdi, vManager.
- Ability to work with external vendors and drive design improvements.
Want more jobs like this?
Get jobs delivered to your inbox every week.
About the job
Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As part of the front-end CAD team you will be responsible for contributing to design verification methodologies like test planning, simulation flows, optimization, test bench optimizations, and AI-enabled verification methodologies etc. for SoC's. To achieve design objectives, the position demands a comprehensive grasp of the design verification domain, enabling the seamless integration of design verification principles into the design process. You will be working directly with design verification engineers to understand their needs and building efficient solutions that scale across multiple projects and tech nodes.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
The US base salary range for this full-time position is $150,000-$223,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target salaries for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google .
Responsibilities
- Develop methodology for various System on a Chip(SoC) design verification tasks capable of handling multi-million gate designs.
- Optimize existing CAD flows for efficiency, performance, and scalability.
- Work with global design verification teams to understand requirements and enable scalable solutions.
- Work across functional domains to enable development and deployment of DV solutions.
- Drive EDA vendors to improve their tools to deliver custom solutions for Google, and partner with EDA and verification teams to enable newer industry solutions