Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
  
• Experience working in main interconnects, Direct Memory Access (DMA), controllers, and power management.
  
• Experience capturing design specification in a temporal assertion language (e.g., SVA or PSL).
  

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering or Computer Science, or a related field.
  
• Experience working with one or more formal verification tools (e.g., JasperGold, VC Formal, Questa Formal, or DV360).
  

About the job

Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities

• Plan the formal verification strategy and create the properties and constraints for digital design blocks.
• Utilize formal property verification tools combined with formal verification closure techniques to verify properties.
• Contribute improvements to methodologies to enhance formal verification results. Resolve difficult to verify properties.
• Architect and implement reusable formal verification components.