Minimum qualifications:
- Bachelor's degree in Materials, Mechanical, Electrical Engineering, a related engineering field, or equivalent practical experience.
- 5 years of experience with advanced packaging technologies for HPC applications, including 2.5D/3D packaging.
- Experience with package integration or a similar role.
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture, or a related field.
- Experience with HBM memory packaging and its integration into the packaging solution.
- Experience with high-volume manufacturing processes and yield improvement.
- Experience with assembly houses or wafer foundries.
- Understanding of multidisciplinary interactions between packaging technology, chip package electrical design, thermal and mechanical performance and manufacturability/reliability.
- Understanding of advanced foundry process nodes and their interactions with package reliability and different package technologies.
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About the job
Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Chip Package Technologist, you will develop packaging solutions for future TPU products. You will define and execute test vehicle qualifications, design experiments to improve reliability, quality, and yield, and lead collaborations with external partners like foundries and OSATs. You will also work with cross-functional teams, including electrical, thermal, mechanical, reliability, and manufacturing.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
The US base salary range for this full-time position is $150,000-$223,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target salaries for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google .
Responsibilities
- Develop and qualify advanced chip package solutions for TPUs.Act as the point of contact for manufacturing partners, driving alignment and resolving technical issues.
- Establish test vehicle development engineering plans and conduct experiments to drive package materials selection and process optimization to meet performance, reliability, and cost goals.
- Generate assembly process and reliability test plans.Work closely with assembly houses and manufacturing partners to ensure smooth transition from design to production.
- Drive collaboration with multi-functional internal teams, OSATs and material suppliers to deliver chip package solutions for production.
- Stay abreast of industry trends and emerging technologies in advanced packaging.