Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
- Experience with software version control systems (e.g., Git, Mercurial), and concepts of branches, commits, and merges.
- Experience working with cross-functional teams for quality tape-outs.
- 5 years of experience in scripting languages (e.g., Unix Shell, Python) to build tools and flows.
- Experience working with Register-Transfer Level (RTL) teams and design integration methodologies that improve team productivity and velocity.
- Experience with design verification techniques, including constrained-random simulation, formal property verification, or static verification.
- Experience evaluating multiple vendor solutions and driving tool decisions/design improvements.
- Experience with ASIC design, debug, and verification flows.
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About the job
Google's custom-designed machines make up one of the largest and most powerful computing infrastructures in the world. The Hardware Testing Engineering team ensures that this cutting-edge equipment is reliable. In the R&D lab, you design test equipment for prototypes of our machinery and develop the protocols used to scale these tests for the entire global team. Working closely with design engineers, you give input on designs to improve our hardware until you're sure it meets Google's standards of quality and reliability.
As a Chip Infrastructure Engineer, you will plan and execute work in an innovative and fast-paced environment, with a focus on infrastructure that enables design and verification teams to produce the chips that power Google's computing needs. You'll be part of the chip infrastructure team responsible for compute, storage, common chip design components, and front-end tool flows.
In this role, you will work with architects, logic designers, and verification engineers to develop flows to build and verify SoC chip designs. You'll also work closely with software, physical design, silicon bring-up and validation teams to enable a successful software integration, implementation, silicon bringup and deliver quality silicon.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
- Work with partner teams to provide the compute, storage and methodology needs of the chip design, verification and physical design teams.
- Collaborate with Application-Specific Integrated Circuit (ASIC) teams to implement tools and methodologies.
- Design and implement CAD tools, solutions and methodologies for ASIC development.
- Extend the capabilities of third-party tools through their dedicated APIs.
- Provide documentation, training, and support to increase end user productivity.