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Central Processing Unit Physical Design Implementation Engineer, Silicon

AT Google
Google

Central Processing Unit Physical Design Implementation Engineer, Silicon

Taipei, Taiwan

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience.
  • 3 years of experience in physical design.
  • Experience in one or more sign-off convergence in Static timing analysis (STA) electrical checks and physical verification domains.
  • Expertise in high-performance, low-power physical design and implementation techniques with industry standard implementation and signoff tools.
Preferred qualifications:
  • 3 years of industry experience with high-performance CPUs.
  • Experience in using Static Timing Analysis (STA), power grid network delivery, and power analysis tools.
  • Knowledge of Central Processing Unit (CPU) including critical iterations for timing and low power microarchitecture and implementation techniques for CPUs.
  • Knowledge of computer architecture, logic design, RTL and Knowledge of Verilog/SystemVerilog.

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About the job

Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Responsibilities

  • Develop RTL2GDS Physical Design tools and flows for advanced CPU designs to achieve Performance, Power, Area (PPA).
  • Collaborate with the Register-Transfer Level (RTL) Design teams on micro-architectural critical items for timing and power convergence.
  • Manage block and hierarchical design physical implementation and Quality of Result (QoR) (e.g., power, timing, area).

Client-provided location(s): New Taipei City, Taiwan
Job ID: Google-134084177841529542
Employment Type: Other

Perks and Benefits

  • Health and Wellness

    • Health Insurance
    • Dental Insurance
    • Vision Insurance
    • Life Insurance
    • Short-Term Disability
    • Long-Term Disability
    • FSA
    • HSA
    • Fitness Subsidies
    • On-Site Gym
    • Mental Health Benefits
    • Health Reimbursement Account
    • HSA With Employer Contribution
  • Parental Benefits

    • Birth Parent or Maternity Leave
    • Non-Birth Parent or Paternity Leave
    • Fertility Benefits
    • Adoption Assistance Program
    • Family Support Resources
    • Adoption Leave
  • Work Flexibility

    • Hybrid Work Opportunities
  • Office Life and Perks

    • Commuter Benefits Program
    • Casual Dress
    • Pet-friendly Office
    • Snacks
    • Some Meals Provided
    • On-Site Cafeteria
  • Vacation and Time Off

    • Paid Vacation
    • Paid Holidays
    • Personal/Sick Days
    • Leave of Absence
    • Volunteer Time Off
  • Financial and Retirement

    • 401(K) With Company Matching
    • Company Equity
    • Performance Bonus
    • Financial Counseling
  • Professional Development

    • Tuition Reimbursement
    • Internship Program
    • Learning and Development Stipend
  • Diversity and Inclusion

    • Employee Resource Groups (ERG)

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