Minimum qualifications:
- Bachelor's or Master's degree in Electronic, Electrical, Computer Science, or a related technical field, or equivalent practical experience.
- 4 years of experience in Analog Mixed Signal (AMS) design verification.
- Experience in System Verilog and real number modeling.
- Experience with Cadence Spectre and Analog Mixed Signal simulator or related tools.
- Experience with Analog Internet Protocols (e.g., ADC/DAC, LDO, PLL, Serdes).
- Experience with Universal Verification Methodology.
- Experience with coding language (e.g., Python, Tcl or Perl).
- Experience with functional models in C, Verilog or System Verilog.
- Experience in Gate Level Simulations.
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About the job
Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
- Guide Analog Mixed Signal (AMS) IP/chip verification, including reviewing design specifications and defining and executing a verification plan to ensure compliance with specifications.
- Architect, implement and automate analog, digital and Analog Mixed Signal (AMS) test benches to verify pre-silicon designs.
- Build System Verilog real number analog behavioral models, monitors and checkers for Digital Mixed Signal/Analog Mixed Signal (DMS/AMS) design.
- Work with analog, digital and system designers to verify the implementation meets system requirements.
- Work with digital design verification engineers to architect and implement tests to verify analog/digital interfaces.