At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
We are looking for a Software Architect to improve performance and capacity of gate and transistor level simulations. Candidate will be expected to drive architectural changes within the Xcelium Simulation engine.
Responsibilities include, but are not limited to:
- Understand customer challenges and drive short-, medium- and long-term changes in the gate/transistor engine to enhance its capacity and performance.
- Able to improve profile reports and identify optimization opportunities from profiles.
- Work with product engineering team and directly with customers to deploy latest optimizations and methodologies.
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Qualifications:
- BS Degree in Electrical or Computer Science/Engineering or equivalent minimum of 12 years of experience OR MS with a minimum of 10 years of experience OR PhD with a minimum of 8 years of experience
- Senior engineer with 10-15 years' experience and proficiency in Verilog, C/C++, Data structures and algorithms
- Capable of doing profile guided and algorithmic optimizations in the simulator.
- EDA background is a plus. Logic simulation background is a plus plus.
- Strong verbal and written communication skills in English, including presentation skills, and team working.
- Willing to travel worldwide to work closely with customers in any part of the world.
Additional Information:
Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization. We strive to attract a qualified and diverse candidate pool and encourage diversity and inclusion in the workplace.
Travel: up to 25% (ensure to call out relevant travel %)
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