At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
The Physical Verification R&D Software Engineering role is a multi-faceted position encapsulating a mix of physical verification software development, algorithm development, software debugging, performance optimization and accuracy analysis.
R&D engineers collaborate with a large team of EDA professionals across multiple cultures to create and deliver best in class next generation software for physical IC development.
The R&D engineering can work on complicated applications and interface them with other high connected applications in a large suite of tools to enable next-generation physical verification solutions with superior performance and usability.
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R&D engineers develop code that satisfies the requirements for successful semiconductor design deployment.
Desired Skills and Experience (with different levels of experience):
- 3+ years of experience in software development using C/C++, with a focus in working with complex algorithms and performance
- 1+ years of experience using Linux
- Must be a fast learner and must demonstrate strong aptitude for out-of-the-box thinking and problem solving
- Algorithmic knowledge relating to graphs is a plus
- Experience in deck development for LVS is a plus
- Experience in physical signoff methodologies within the Physical implementation environment would be an added advantage.
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