At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Responsibilities :
B.Tech/BE/ME/Mtech
Job Description
Design and lead high speed IP (USB3, PCIE, DPHY etc) development. Need to be a strong individual contributor in analog domain. Will be required to participate in all aspects of development - analog design, layout, digital design, documentation and silicon validation. Would be required to participate in customer facing discussions.
Requirements
B.Tech/BE/ME/Mtech
Exp - 6 +yrs
• Hands on design experience in various analog IP like PLLs, data converters, serial interfaces etc.
• Must have participated in full cycles of analog IP creation - right from spec to silicon debug and char
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