At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job responsibilities:

• Responsible for designing, developing, for updating, maintaining, documenting and supporting IP models of standard AMBA protocols and proprietary CUP protocol for use on hardware based verification products.
• Work closely with customer to adopt and develop new features and spec version on new proprietary CUP protocol.
• Interface with internal teams (AE, PE, VIP and ABVIP), and external customer (Mainly Xiaomi) to work on diverse problems and solutions related to emulation, simulation, or verification.
• Perform as team member toward cross verification of and cross training in AMBA IP as well as in developing and using lifecycle processes to ensure product quality.

• The position requires BSEE, or equivalent, with a minimum of 4 years of industry experience in designing hardware and software systems.
• Must have excellent communication skills with both written and spoken English.
• C / C++ knowledge and hands-on experience.
• RTL design knowledge using Verilog/SystemVerilog is required along with experience using RTL verification tools and flows.
• Debugging experience.
• Experience with team-wide collaboration tools and process.
• Drive and ability to schedule workload and plan own tasks effectively.

• Verification experience using Cadence simulation and/or emulation products is highly desired.
• Experience in AMBA protocols is highly desired . CHI knowledge / experience is strongly recommended and is a big advantage.