At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.
Cadence customers are the world's most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
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Job Title: Digital Verification Intern
Location: Warsaw, Poland
Reports to: Verification Site Lead
Job Overview:
If you would like to gain first experience in SoC design/verification - join our team for an internship! As Intern DV Engineer you will have an opportunity to co-create complete virtual components from design specification through the verification process up to providing a complex SoC design.
Job Responsibilities:
- Digital IP/SoC verification from concept to sign-off.
Job Qualifications:
- Basic knowledge of digital electronics and Hardware Description Languages (Verilog/VHDL)
- Understanding of Object-Oriented Programing (OOP) principles
- Good English
Additional Skills/Preferences:
- Experience in Digital Design for FPGA or ASIC
- Knowledge of verification methodologies UVM, SVA, Formal
- Knowledge of Python, Tcl/Tk, or other scripting languages
Additional Information:
Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization. We strive to attract a qualified and diverse candidate pool and encourage diversity and inclusion in the workplace.
Travel: Not required
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