Senior Staff Semiconductor Design Engineer, Memory controller uArch

We are Aptiv - a global technology company with 190,000 specialists in 46 countries. We develop innovative software and build the hardware to bring autonomous driving cars, advanced driver-assistance systems, connected vehicles and smart cities to life in a way that only we can. We work in partnership with almost all car manufacturers. Our sensors, systems and software can already be found in almost all passenger cars today.

With our deep domain expertise, Aptiv is developing solutions that solve our customers' toughest challenges. We are enabling the transition to software-defined vehicles supported by electrified and intelligently connected architectures - which will combine to power the future of mobility.

• Own SoC memory controller & PHY micro architecture including integration into SoC
• Analyze complex data flows at the subsystem and full chip level.
• Have good knowledge on The JEDEC memory specifications for semiconductor memory circuits and similar storage devices.
• Strong experience with using 3rd party Memory controllers and PHYs for (LP)DDR4, 5, 6 and HBM 2,3,4.
• Perform high-level performance modeling/simulation and analysis of memory controller features, applications, benchmarks, and complex uses cases
• Define performance enhancement techniques such as end to end hashing for the performance
• Work with the 3rd party IP vendors to make sure SoC power and performance targets per use cases are fully covered with their IP offering.
• Interact with the design partner teams to define IP integration, SoC flows to make sure SoC level targets are met.
• Work with design partner and IP teams to review Lint, CDC, SDC, Verification strategy at SoC level.
• Work with IP vendor and design partners to make sure coherency through the fabric, end to end latency, data flow, performance requirements are met.
• Track changes, progress on additional features required from IP vendor specific for Aptiv SoC.
• Coach and mentor others in your areas of expertise

• Bachelor's degree in electrical engineering, computer engineering, or equivalent.
• 12 + years of experience in ARM CPU based full chip SoC development.
• Experience with SoC subsystem and full chip development for a complex silicon project from concept to launch.
• Strong experience with using 3rd party Memory controllers and PHYs for (LP)DDR4, 5, 6 and HBM2,3,4.
• High proficiency in architecture analysis and performance modeling, ranging from simple analytical models to complex cycle accurate performance model and correlation, especially around fabric, system cache and memory controller
• Ability to leverage existing simulation capabilities (GEM5, FastSIM, Platform Architect) or create new simulation capabilities when necessary
• Detailed knowledge of ARM bus infrastructure (ACE/AXI/AHB), JEDEC standards

• You can grow at Aptiv. Whether you are working towards a promotion, stepping into leadership, considering a lateral career move, or simply expanding your network - you can do it here. Aptiv provides an inclusive work environment where all individuals can grow and develop, regardless of gender, ethnicity or beliefs.
• You can have an impact. Safety is a core Aptiv value; we want a safer world for us and our children, one with: Zero fatalities, Zero injuries, Zero accidents.
• You have support. Our team is our most valuable asset. We ensure you have the resources and support you need to take care of your family and your physical and mental health with a competitive health insurance package.

• Hybrid and flexible working hours;
• Higher Education Opportunities (UDACITY, UDEMY, COURSERA are available for your continuous growth and development);
• Life and accident insurance;
• Sodexo cards for food and beverages
• Well Being Program that includes regular workshops and networking events;
• EAP Employee Assistance;
• Access to fitness clubs (T&C apply);
• Creche facility for working parents;