Summary
Posted: Oct 7, 2024
Weekly Hours: 5
Role Number:200571027
Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you'll be responsible for crafting and building the technology that fuels Apple's devices. Together, you and your team will enable our customers to do all the things they love with their devices. Imagine working in a team where the only limits are the laws of physics and your imagination. At Apple, great ideas have a way of becoming great products and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. The same real passion for innovation that goes into our products also applies to our practices. Join the team that optimizes and delivers world-class GPUs into Apple Silicon. As part of the GPU FE Implementation team, you'll be responsible for crafting and building a GPU that enriches the lives of millions of people every day.
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Description
The successful candidate will work closely with the RTL and PD (physical design) teams and be responsible for synthesis and optimization of the delivered IP. You will use and develop advanced techniques to meet challenging timing, power and area targets while also working with our partners in STA and DFT to achieve successful first silicon. Through this collaboration, you will deliver the best-in-class GPU's for the best consumer products. If you're ready to help chart the future of Apple Silicon, we'd love to talk to you.
- Education:
- Bachelors in electrical engineering, computer engineering, or related field.
Preferred Qualifications
- Highly motivated individuals with design synthesis experience that value crafted RTL design principles and quality physical design implementation.
- Own block level synthesis and drive optimizations using advanced synthesis techniques and RTL design improvement for optimal Area, Timing Power.
- Understand and be willing to collaborate with Physical Design/Timing teams on physical concepts like floor-planning, placement, congestion, and timing constraints.
- Ability to analyze critical paths and help drive closure across Design and Backend teams.
- Experience with using logic equivalence and netlist checks to validate functionality/quality.
- Ability to tackle complex problems across multiple domains.
- Excellent written and verbal communication, exceptional organization skills and ability to work well within multi-discipline teams.
- Relevant scripting experience in ASIC flows - TCL, Perl, Data manipulation
Education & Experience
Additional Requirements
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- Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.